• 4853 Citations
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1991 …2019
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Research Output 1991 2019

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2019

A Log-Likelihood Ratio based Generalized Belief Propagation

Amaricai, A., Bahrami, M. & Vasić, B., Jul 2019, EUROCON 2019 - 18th International Conference on Smart Technologies. Dumnic, B., Delimar, M. & Stefanovic, C. (eds.). Institute of Electrical and Electronics Engineers Inc., 8861528. (EUROCON 2019 - 18th International Conference on Smart Technologies).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Log-likelihood Ratio
Belief Propagation
Data storage equipment
Computer-Assisted Image Processing
Floating point

Constraint satisfaction through GBP-guided deliberate bit flipping

Bahrami, M. & Vasic, B. V., Jan 1 2019, Algebraic Informatics - 8th International Conference, CAI 2019, Proceedings. Ćirić, M., Pin, J-É. & Droste, M. (eds.). Springer-Verlag, p. 26-37 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 11545 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Constraint Satisfaction
Dependent Data
Flip
Binary
Configuration

Girth-Eight Reed-Solomon Based QC-LDPC Codes

Xiao, X., Vasic, B. V., Lin, S., Abdel-Ghaffar, K. & Ryan, W. E., Jan 23 2019, 2018 IEEE 10th International Symposium on Turbo Codes and Iterative Information Processing, ISTC 2018. IEEE Computer Society, 8625328. (International Symposium on Turbo Codes and Iterative Information Processing, ISTC; vol. 2018-December).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Quasi-cyclic Codes
Reed-Solomon codes
LDPC Codes
Girth
Parity

Quasi-Cyclic LDPC Codes for Correcting Multiple Phased Bursts of Erasures

Xiao, X., Vasić, B., Lin, S., Abdel-Ghaffar, K. & Ryan, W. E., Jul 2019, 2019 IEEE International Symposium on Information Theory, ISIT 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 71-75 5 p. 8849853. (IEEE International Symposium on Information Theory - Proceedings; vol. 2019-July).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Quasi-cyclic Codes
LDPC Codes
Burst
Binary
Adjacency

Syndrome-Generalized Belief Propagation Decoding for Quantum Memories

Raveendran, N., Bahrami, M. & Vasic, B. V., May 1 2019, 2019 IEEE International Conference on Communications, ICC 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8761366. (IEEE International Conference on Communications; vol. 2019-May).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Decoding
Data storage equipment
2018

Constraint gain for two dimensional magnetic recording channels

Bahrami, M., Vasic, B. V. & Marcellin, M. W., Jan 1 2018, 54th Annual International Telemetering Conference and Technical Exhibition, ITC 2018: Reliable and Secure Data, Links and Networks. International Foundation for Telemetering, (Proceedings of the International Telemetering Conference; vol. 2018-November).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Magnetic recording
magnetic recording
Magnetic heads
propagation
estimates
1 Citation (Scopus)

Efficient FPGA implementation of probabilistic gallager B LDPC decoder

Ghaffari, F., Unal, B., Akoglu, A., Le, K., Declercq, D. & Vasic, B. V., Feb 14 2018, ICECS 2017 - 24th IEEE International Conference on Electronics, Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 178-181 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Decoding
Field programmable gate arrays (FPGA)
Message passing
Throughput
Monte Carlo simulation

Generic architectures for uniformly reweighted APP decoders

Ilic, V., Dupraz, E. & Vasic, B. V., Jan 3 2018, 2017 13th International Conference on Advanced Technologies, Systems and Services in Telecommunications, TELSIKS 2017 - Proceeding. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 308-316 9 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Throughput
Hardware
Data storage equipment
Bit error rate
Computer hardware

Hard-decision decoding of LDPC codes under timing errors: Overview and new results

Brkic, S., Ivanis, P. & Vasic, B. V., Jan 5 2018, 2017 25th Telecommunications Forum, TELFOR 2017 - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2017-January. p. 1-8 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Decoding
Memory architecture
Logic gates
Error correction
Hardware
1 Citation (Scopus)

Learning to decode LDPC codes with finite-alphabet message passing

Vasic, B. V., Xiao, X. & Lin, S., Oct 23 2018, 2018 Information Theory and Applications Workshop, ITA 2018. Institute of Electrical and Electronics Engineers Inc., 8503199

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Low-density Parity-check (LDPC) Codes
Decode
Message passing
Message Passing
Neural Networks
1 Citation (Scopus)

Multi-beam free-space optical link using space-time coding

Anguita, J. A., Neifeld, M. A. & Vasic, B. V., Mar 21 2018, 2006 International Waveform Diversity and Design Conference, WDD 2006 - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 1-4 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Optical links
Telecommunication links
coding
Block codes
Optical communication
1 Citation (Scopus)

Probabilistic Gradient Descent Bit-Flipping Decoders for Flash Memory Channels

Ghaffari, F. & Vasic, B. V., Apr 26 2018, 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-May. 8351713

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Flash memory
Statistical mechanics
Message passing
Error correction
Decoding
4 Citations (Scopus)

Reed-solomon-based quasi-cyclic LDPC codes: Designs, cycle structure and erasure correction

Xiao, X., Ryan, W. E., Vasic, B. V., Lin, S. & Abdel-Ghaffar, K., Oct 23 2018, 2018 Information Theory and Applications Workshop, ITA 2018. Institute of Electrical and Electronics Engineers Inc., 8503226

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Quasi-cyclic Codes
Reed-Solomon codes
LDPC Codes
Cycle
Reed-Solomon Codes
1 Citation (Scopus)

Serial concatenation of reed muller and LDPC codes with low error floor

Xiao, X., Nasseri, M., Vasic, B. V. & Lin, S., Jan 17 2018, 55th Annual Allerton Conference on Communication, Control, and Computing, Allerton 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 688-693 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Low-density Parity-check (LDPC) Codes
Concatenation
Decoding
Galois field
Trapping

Stochastic resonance in iterative decoding: Message passing and gradient descent bit flipping

Ivanis, P., Brkic, S. & Vasic, B. V., Jan 3 2018, 2017 13th International Conference on Advanced Technologies, Systems and Services in Telecommunications, TELSIKS 2017 - Proceeding. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 300-307 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Iterative decoding
Message passing
Logic gates
Decoding
Cryptography
1 Citation (Scopus)

Towards the exact rate-memory trade-off for uncoded caching with secure delivery

Bahrami, M., Attia, M. A., Tandon, R. & Vasic, B. V., Jan 17 2018, 55th Annual Allerton Conference on Communication, Control, and Computing, Allerton 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 878-885 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Caching
Servers
Trade-offs
Data storage equipment
Server

Trapping Set Analysis of Horizontal Layered Decoder

Raveendran, N. & Vasic, B. V., Jul 27 2018, 2018 IEEE International Conference on Communications, ICC 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-May. 8422965

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Decoding
2017
2 Citations (Scopus)

Analysis and implementation of resource efficient probabilistic Gallager B LDPC decoder

Unal, B., Ghaffari, F., Akoglu, A., Declercq, D. & Vasic, B. V., Aug 11 2017, Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017. Institute of Electrical and Electronics Engineers Inc., p. 333-336 4 p. 8010173

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Decoding
Error correction
Field programmable gate arrays (FPGA)
Communication systems
Throughput
7 Citations (Scopus)

A novel high-throughput, low-complexity bit-flipping decoder for LDPC codes

Le, K., Ghaffari, F., Declercq, D., Vasic, B. V. & Winstead, C., Dec 5 2017, Proceedings of the 2017 International Conference on Advanced Technologies for Communications, ATC 2017. IEEE Computer Society, Vol. 2017-October. p. 126-131 6 p. 8167601

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Throughput
Decoding
Signal generators
Error correction
Field programmable gate arrays (FPGA)
8 Citations (Scopus)

Approaching maximum likelihood performance of LDPC codes by stochastic resonance in noisy iterative decoders

Vasic, B. V., Ivaniš, P., Declercq, D. & LeTrung, K., Mar 27 2017, 2016 Information Theory and Applications Workshop, ITA 2016. Institute of Electrical and Electronics Engineers Inc., 7888185

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Maximum likelihood
Hardware
Nails
Logic gates
Error correction
1 Citation (Scopus)

Generalized belief propagation based deliberate bit flipping modulation coding

Bahrami, M. & Vasic, B. V., Feb 2 2017, 2016 IEEE Global Communications Conference, GLOBECOM 2016 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 7841858

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Modulation
Magnetic recording
Error correction
1 Citation (Scopus)

Hardware optimization of the perturbation for probabilistic gradient descent bit flipping decoders

Le, K., Ghaffari, F., Declercq, D. & Vasic, B. V., Sep 25 2017, IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 8050695

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Decoding
Error correction
Application specific integrated circuits
Statistical methods

Message-aggregation enhanced iterative hard-decision decoders

Brkic, S., Ivanis, P., Vasic, B. V. & Declercq, D., Mar 27 2017, 2016 Information Theory and Applications Workshop, ITA 2016. Institute of Electrical and Electronics Engineers Inc., 7888184

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Agglomeration
Iterative decoding
Decoding
2 Citations (Scopus)

Multi-bit flipping algorithms with probabilistic gradient descent

Vasic, B. V., Ivanis, P. & Brkic, S., Aug 30 2017, 2017 Information Theory and Applications Workshop, ITA 2017. Institute of Electrical and Electronics Engineers Inc., 8023480

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Boolean functions
Throughput
1 Citation (Scopus)

Multi-mode low-latency software-defined error correction for data centers

Ghaffari, F., Akoglu, A., Vasic, B. V. & Declercq, D., Sep 14 2017, 2017 26th International Conference on Computer Communications and Networks, ICCCN 2017. Institute of Electrical and Electronics Engineers Inc., 8038467

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data Center
Error correction
Error Correction
Flash Memory
Flash memory
1 Citation (Scopus)

Performance of taylor-kuznetsov memories under timing errors

Dupraz, E., Vasic, B. V. & Declercq, D., Jul 28 2017, 2017 IEEE International Conference on Communications, ICC 2017. Institute of Electrical and Electronics Engineers Inc., 7996548

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Memory architecture
Networks (circuits)
1 Citation (Scopus)

Stochastic resonance decoding for quantum LDPC codes

Raveendran, N., Nadkarni, P. J., Garani, S. S. & Vasic, B. V., Jul 28 2017, 2017 IEEE International Conference on Communications, ICC 2017. Institute of Electrical and Electronics Engineers Inc., 7996747

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Error correction
Decoding
Iterative decoding
Logic gates
Networks (circuits)
2016
7 Citations (Scopus)

Generalized belief propagation based TDMR detector and decoder

Matcha, C. K., Bahrami, M., Roy, S., Srinivasa, S. G. & Vasic, B. V., Aug 10 2016, Proceedings - ISIT 2016; 2016 IEEE International Symposium on Information Theory. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-August. p. 210-214 5 p. 7541291

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Belief Propagation
Magnetic recording
Detector
Detectors
Intersymbol Interference
4 Citations (Scopus)

Guaranteed error correction of faulty bit-flipping decoders under data-dependent gate failures

Brkic, S., Ivanis, P. & Vasic, B. V., Aug 10 2016, Proceedings - ISIT 2016; 2016 IEEE International Symposium on Information Theory. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-August. p. 1561-1565 5 p. 7541561

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Low-density Parity-check (LDPC) Codes
Dependent Data
Error correction
Error Correction
Expander
7 Citations (Scopus)

Improved PEG construction of large girth QC-LDPC codes

Diouf, M., Declercq, D., Fossorier, M., Ouya, S. & Vasic, B. V., Oct 17 2016, 2016 9th International Symposium on Turbo Codes and Iterative Information Processing: Paths to 5G and Beyond, ISTC 2016. IEEE Computer Society, Vol. 2016-October. p. 146-150 5 p. 7593094

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Quasi-cyclic Codes
Low-density Parity-check (LDPC) Codes
Girth
Polyethylene glycols
Cycle
6 Citations (Scopus)

Information rates of constrained TDMR channels using generalized belief propagation

Khatami, M., Bahrami, M. & Vasic, B. V., Feb 23 2016, 2015 IEEE Global Communications Conference, GLOBECOM 2015. Institute of Electrical and Electronics Engineers Inc., 7417728

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Magnetic recording
recording
Bit error rate
Channel capacity
coding
6 Citations (Scopus)

Noise-aided gradient descent bit-flipping decoders approaching maximum likelihood decoding

Declercq, D., Winstead, C., Vasic, B. V., Ghaffari, F., Ivanis, P. & Boutillon, E., Oct 17 2016, 2016 9th International Symposium on Turbo Codes and Iterative Information Processing: Paths to 5G and Beyond, ISTC 2016. IEEE Computer Society, Vol. 2016-October. p. 300-304 5 p. 7593125

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Gradient Descent
Trapping
Maximum likelihood
Maximum Likelihood
Decoding
2 Citations (Scopus)

Performance evaluation of faulty iterative decoders using absorbing Markov chains

Ivanis, P., Vasic, B. V. & Declercq, D., Aug 10 2016, Proceedings - ISIT 2016; 2016 IEEE International Symposium on Information Theory. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-August. p. 1566-1570 5 p. 7541562

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Logic gates
Absorbing
Markov processes
Performance Evaluation
Markov chain
2015
2 Citations (Scopus)

Analysis of Taylor-Kuznetsov memory using one-step majority logic decoder

Dupraz, E., Declercq, D. & Vasic, B. V., Oct 27 2015, 2015 Information Theory and Applications Workshop, ITA 2015 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 46-53 8 p. 7308965

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Majority logic
Data storage equipment
Degradation
10 Citations (Scopus)

A PEG-like LDPC code design avoiding short trapping sets

Diouf, M., Declercq, D., Ouya, S. & Vasic, B. V., Sep 28 2015, IEEE International Symposium on Information Theory - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-June. p. 1079-1083 5 p. 7282621

Research output: Chapter in Book/Report/Conference proceedingConference contribution

LDPC Codes
Trapping
Girth
Cost functions
Quasi-cyclic Codes

Decoder diversity architectures for finite alphabet iterative decoders

Vasic, B. V., Declercq, D. & Planjery, S. K., Apr 24 2015, Conference Record - Asilomar Conference on Signals, Systems and Computers. IEEE Computer Society, Vol. 2015-April. p. 131-135 5 p. 7094412

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Decoding
12 Citations (Scopus)

Efficient realization of probabilistic gradient descent bit flipping decoders

Le, K., Declercq, D., Ghaffari, F., Spagnol, C., Popovici, E., Ivanis, P. & Vasic, B. V., Jul 27 2015, Proceedings - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-July. p. 1494-1497 4 p. 7168928

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Error correction
Hardware
Binary sequences
10 Citations (Scopus)

Fault-resilient decoders and memories made of unreliable components

Vasic, B. V., Ivanis, P., Brkic, S. & Ravanmehr, V., Oct 27 2015, 2015 Information Theory and Applications Workshop, ITA 2015 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 136-142 7 p. 7308978

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Iterative decoding
Hardware
Data storage equipment
Logic gates
Free energy
4 Citations (Scopus)

Low complexity memory architectures based on LDPC codes: Benefits and disadvantages

Vasic, B. V., Ivaniš, P. & Brkic, S., Dec 14 2015, 2015 12th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services, TELSIKS 2015. Institute of Electrical and Electronics Engineers Inc., p. 11-18 8 p. 7357727

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Memory architecture
Data storage equipment
Error correction
9 Citations (Scopus)

MUDRI: A fault-tolerant decoding algorithm

Ivanis, P., Al Rasheed, O. & Vasic, B. V., Sep 9 2015, IEEE International Conference on Communications. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-September. p. 4291-4296 6 p. 7248997

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Decoding
Hardware
Logic gates
7 Citations (Scopus)

Symmetric information rate estimation and bit aspect ratio optimization for TDMR using Generalized Belief Propagation

Khatami, M., Bahrami, M. & Vasic, B. V., Sep 28 2015, IEEE International Symposium on Information Theory - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-June. p. 1620-1624 5 p. 7282730

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Information Rates
Belief Propagation
Magnetic recording
Aspect Ratio
Aspect ratio
2014
15 Citations (Scopus)

Analysis of one-step majority logic decoding under correlated data-dependent gate failures

Brkic, S., Ivanis, P. & Vasic, B. V., 2014, IEEE International Symposium on Information Theory - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 2599-2603 5 p. 6875304

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Majority logic
Correlated Data
Bit error rate
Markov processes
Decoding
2 Citations (Scopus)

Check-hybrid GLDPC codes: Systematic elimination of trapping sets by super checks

Ravanmehr, V., Declercq, D. & Vasic, B. V., 2014, IEEE International Symposium on Information Theory - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 701-705 5 p. 6874923

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Low-density Parity-check (LDPC) Codes
Trapping
Elimination
LDPC Codes
Eliminate
1 Citation (Scopus)

Check-hybrid GLDPC codes without small trapping sets

Ravanmehr, V., Declercq, D. & Vasic, B. V., 2014, 2014 Information Theory and Applications Workshop, ITA 2014 - Conference Proceedings. IEEE Computer Society, 6804215

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Failure analysis of two-bit flipping decoding algorithms

Vasic, B. V. & Nguyen, D. V., Dec 12 2014, 2014 International Conference on Signal Processing and Communications, SPCOM 2014. Institute of Electrical and Electronics Engineers Inc., 6983914

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Failure analysis
Decoding
13 Citations (Scopus)

Finite alphabet iterative decoders robust to faulty hardware: Analysis and selection

Dupraz, E., Declercq, D., Vasic, B. V. & Savin, V., Nov 12 2014, International Symposium on Turbo Codes and Iterative Information Processing, ISTC. IEEE Computer Society, p. 107-111 5 p. 6955095

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Iterative decoding
Threshold Phenomena
Iterative Decoding
LDPC Codes
2 Citations (Scopus)

GBP-based detection and symmetric information rate for rectangular-grain TDMR model

Khatami, M., Ravanmehr, V. & Vasic, B. V., 2014, IEEE International Symposium on Information Theory - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 1618-1622 5 p. 6875107

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Information Rates
Belief Propagation
Magnetic recording
Factor Graph
Tiling
2 Citations (Scopus)

On the guaranteed error-correction of decimation-enhanced iterative decoders

Planjery, S. K., Declercq, D., Diouf, M. & Vasic, B. V., Nov 12 2014, International Symposium on Turbo Codes and Iterative Information Processing, ISTC. IEEE Computer Society, p. 57-61 5 p. 6955085

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Decimation
Error correction
Error Correction
LDPC Codes
Sufficient Conditions
4 Citations (Scopus)

Two-dimensional noise-predictive maximum likelihood method for magnetic recording channels

Matcha, C. K., Srinivasa, S. G., Khatami, S. M. & Vasic, B. V., Dec 8 2014, Proceedings of 2014 International Symposium on Information Theory and Its Applications, ISITA 2014. Institute of Electrical and Electronics Engineers Inc., p. 679-683 5 p. 6979930

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Magnetic recording
Signal detection
Maximum likelihood
Equalizers
Detectors
2 Citations (Scopus)

Uniformly reweighted APP decoder for memory efficient decoding of LDPC Codes

Ilic, V., Dupraz, E., Declercq, D. & Vasic, B. V., Jan 30 2014, 2014 52nd Annual Allerton Conference on Communication, Control, and Computing, Allerton 2014. Institute of Electrical and Electronics Engineers Inc., p. 1228-1232 5 p. 7028595

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Decoding
Data storage equipment