A Fast on-Chip Profiler Memory Using a Pipelined Binary Tree

Roman L Lysecky, Susan Cotterell, Frank Vahid

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

We introduce a novel memory architecture that can count the occurrences of patterns on a system's bus, a task known as profiling. Such profiling can serve a variety of purposes, like detecting a microprocessor's software hot spots or frequently used data values, which can be used to optimize various aspects of the system. The memory, which we call ProMem, is based on a pipelined binary search tree structure, yielding several beneficial features, including nonintrusiveness, accurate counts, excellent size and power efficiency, very fast access times, and the use of standard memories with only simple additional logic. The main limitation is that the set of potential patterns must be preloaded into the memory. We describe the ProMem architecture, and show excellent size and performance advantages compared with content-addressable memory (CAM) based designs.

Original languageEnglish (US)
Pages (from-to)120-122
Number of pages3
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume12
Issue number1
DOIs
StatePublished - Jan 2004
Externally publishedYes

Fingerprint

Binary trees
Data storage equipment
System buses
Associative storage
Memory architecture
Microprocessor chips

Keywords

  • Binary search tree
  • Design
  • High performance
  • Memory
  • On-chip profiler
  • Pipelined binary search tree
  • Profiling

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture

Cite this

A Fast on-Chip Profiler Memory Using a Pipelined Binary Tree. / Lysecky, Roman L; Cotterell, Susan; Vahid, Frank.

In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 12, No. 1, 01.2004, p. 120-122.

Research output: Contribution to journalArticle

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