A first-step towards an architecture tuning methodology for low power

Greg Stitt, Frank Vahid, Tony Givargis, Roman Lysecky

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

We describe an automated environment to assist a system-on-a-chip designer to tune a microprocessor core to a particular application program that will run on the microprocessor, and vice-versa, with the goal of reducing embedded system power consumption. We limit such tuning to modifications that do not change the microprocessor instruction set, thus avoiding the large costs that would come with such a change. Our tuning environment for the 8051 microcontroller is freely-available on the web.

Original languageEnglish (US)
Title of host publicationProceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems
PublisherAssociation for Computing Machinery (ACM)
Pages187-192
Number of pages6
ISBN (Print)1581133383, 9781581133387
DOIs
StatePublished - 2000
EventProceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2000) - San Jose, CA, United States
Duration: Nov 17 2000Nov 18 2000

Publication series

NameProceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems

Other

OtherProceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2000)
CountryUnited States
CitySan Jose, CA
Period11/17/0011/18/00

Keywords

  • Cores
  • Embedded systems
  • Low-power
  • Parameterized archiectures
  • System-on-a-chip
  • Tuning

ASJC Scopus subject areas

  • Engineering(all)

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