A new framework for power estimation of embedded systems

Claudio Talarico, Jerzy W. Rozenblit, Vinod Malhotra, Albert Stritter

Research output: Contribution to specialist publicationArticle

32 Scopus citations

Abstract

Among the many metrics used to characterize the quality of an embedded system-on-chip design, power consumption has emerged as one of the most important. This is largely due to the proliferation of mobile battery-powered computing devices, the increasing speed and density of CMOS (complementary metal-oxide semiconductor) VLSI (very large-scale integration) circuits, and continuous shrinking of the transistor feature size of deep-submicron technologies. The authors have developed a technique that derives power figures from the execution of high-level models. This technique makes it possible to assess embedded SoC designs much earlier in the cycle, contributing to sounder decisions throughout the entire development process and leading to a faster execution time. To validate their methodology, the authors applied it to a peripheral core baud rate generator - compared the results with those obtained Using a gate-level approach.

Original languageEnglish (US)
Pages71-78
Number of pages8
Volume38
No2
Specialist publicationComputer
DOIs
StatePublished - Feb 1 2005

ASJC Scopus subject areas

  • Computer Science(all)

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