A non-iterative equivalent waveform model for timing analysis in presence of crosstalk

Kishore Kumar Muchherla, Pinhong Chen, Meiling Wang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In the Deep Sub Micron (DSM) regime, due to non-uniform scaling of interconnects, coupling capacitance between wires becomes an increasingly dominant fraction of the total wire capacitance. Crosstalk causes delay variations on signal lines and raises signal integrity problems. Including crosstalk in timing analysis has become imperative for current technologies. The existing timing analysis methods do not consider gate driving capability, output loading effects and waveform shape, and hence are not always accurate. In this paper, we propose a non-iterative equivalent waveform model that addresses these issues.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
Pages2465-2468
Number of pages4
DOIs
StatePublished - 2005
EventIEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe, Japan
Duration: May 23 2005May 26 2005

Other

OtherIEEE International Symposium on Circuits and Systems 2005, ISCAS 2005
CountryJapan
CityKobe
Period5/23/055/26/05

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Crosstalk
Capacitance
Wire

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Muchherla, K. K., Chen, P., & Wang, M. (2005). A non-iterative equivalent waveform model for timing analysis in presence of crosstalk. In Proceedings - IEEE International Symposium on Circuits and Systems (pp. 2465-2468). [1465125] https://doi.org/10.1109/ISCAS.2005.1465125

A non-iterative equivalent waveform model for timing analysis in presence of crosstalk. / Muchherla, Kishore Kumar; Chen, Pinhong; Wang, Meiling.

Proceedings - IEEE International Symposium on Circuits and Systems. 2005. p. 2465-2468 1465125.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Muchherla, KK, Chen, P & Wang, M 2005, A non-iterative equivalent waveform model for timing analysis in presence of crosstalk. in Proceedings - IEEE International Symposium on Circuits and Systems., 1465125, pp. 2465-2468, IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005, Kobe, Japan, 5/23/05. https://doi.org/10.1109/ISCAS.2005.1465125
Muchherla KK, Chen P, Wang M. A non-iterative equivalent waveform model for timing analysis in presence of crosstalk. In Proceedings - IEEE International Symposium on Circuits and Systems. 2005. p. 2465-2468. 1465125 https://doi.org/10.1109/ISCAS.2005.1465125
Muchherla, Kishore Kumar ; Chen, Pinhong ; Wang, Meiling. / A non-iterative equivalent waveform model for timing analysis in presence of crosstalk. Proceedings - IEEE International Symposium on Circuits and Systems. 2005. pp. 2465-2468
@inproceedings{dee5a0c2d2ec475c96d8d1a02897cea3,
title = "A non-iterative equivalent waveform model for timing analysis in presence of crosstalk",
abstract = "In the Deep Sub Micron (DSM) regime, due to non-uniform scaling of interconnects, coupling capacitance between wires becomes an increasingly dominant fraction of the total wire capacitance. Crosstalk causes delay variations on signal lines and raises signal integrity problems. Including crosstalk in timing analysis has become imperative for current technologies. The existing timing analysis methods do not consider gate driving capability, output loading effects and waveform shape, and hence are not always accurate. In this paper, we propose a non-iterative equivalent waveform model that addresses these issues.",
author = "Muchherla, {Kishore Kumar} and Pinhong Chen and Meiling Wang",
year = "2005",
doi = "10.1109/ISCAS.2005.1465125",
language = "English (US)",
pages = "2465--2468",
booktitle = "Proceedings - IEEE International Symposium on Circuits and Systems",

}

TY - GEN

T1 - A non-iterative equivalent waveform model for timing analysis in presence of crosstalk

AU - Muchherla, Kishore Kumar

AU - Chen, Pinhong

AU - Wang, Meiling

PY - 2005

Y1 - 2005

N2 - In the Deep Sub Micron (DSM) regime, due to non-uniform scaling of interconnects, coupling capacitance between wires becomes an increasingly dominant fraction of the total wire capacitance. Crosstalk causes delay variations on signal lines and raises signal integrity problems. Including crosstalk in timing analysis has become imperative for current technologies. The existing timing analysis methods do not consider gate driving capability, output loading effects and waveform shape, and hence are not always accurate. In this paper, we propose a non-iterative equivalent waveform model that addresses these issues.

AB - In the Deep Sub Micron (DSM) regime, due to non-uniform scaling of interconnects, coupling capacitance between wires becomes an increasingly dominant fraction of the total wire capacitance. Crosstalk causes delay variations on signal lines and raises signal integrity problems. Including crosstalk in timing analysis has become imperative for current technologies. The existing timing analysis methods do not consider gate driving capability, output loading effects and waveform shape, and hence are not always accurate. In this paper, we propose a non-iterative equivalent waveform model that addresses these issues.

UR - http://www.scopus.com/inward/record.url?scp=67649112380&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=67649112380&partnerID=8YFLogxK

U2 - 10.1109/ISCAS.2005.1465125

DO - 10.1109/ISCAS.2005.1465125

M3 - Conference contribution

SP - 2465

EP - 2468

BT - Proceedings - IEEE International Symposium on Circuits and Systems

ER -