An adaptive motion estimation architecture for H.264/AVC

Yang Song, Ali Akoglu

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

We introduce a variable block size motion estimation architecture that is adaptive to the full search (FS) and the three-step search (3SS) algorithms. Early termination, intensive data reuse, pipelined datapath with bit serial execution, and memory access management tailored to the search patterns of the FS and 3SS form key features of the architecture. The design was synthesized using Synopsys Design Compiler and 45nm standard cell library technology. The architecture sustains real-time CIF format with an operational frequency as low as 17.6MHz and consumes 1.98 mW at this clock rate. This architecture with its 500MHz peak operational frequency provides the end-user with the flexibility of choosing between video quality and throughput based on power consumption and processing speed constraints.

Original languageEnglish (US)
Pages (from-to)161-179
Number of pages19
JournalJournal of Signal Processing Systems
Volume73
Issue number2
DOIs
StatePublished - Nov 2013

Fingerprint

Adaptive Estimation
Motion Estimation
Motion estimation
Clocks
Electric power utilization
Throughput
Data Reuse
Early Termination
Data storage equipment
Pattern Search
Video Quality
Processing
Compiler
Power Consumption
Search Algorithm
Flexibility
Real-time
Architecture
Cell
Design

Keywords

  • Adaptive architecture
  • Fast search
  • Full search
  • H.264/AVC
  • Motion estimation

ASJC Scopus subject areas

  • Hardware and Architecture
  • Information Systems
  • Signal Processing
  • Theoretical Computer Science
  • Control and Systems Engineering
  • Modeling and Simulation

Cite this

An adaptive motion estimation architecture for H.264/AVC. / Song, Yang; Akoglu, Ali.

In: Journal of Signal Processing Systems, Vol. 73, No. 2, 11.2013, p. 161-179.

Research output: Contribution to journalArticle

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