An Analysis Tool Set for Reconfigurable Media Processing

A. Dasu, A. Akoglu, S. Panchanathan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Existing media processing solutions such as general purpose processors with media acceleration support or application specific hardware units fail to satisfy the constraints of low power, less silicon area and varying computing demands of the applications. Our research effort aids the design of a dynamically reconfigurable processor through the use of a set of analysis and design tools. This paper describes a part of the first of a set of three tools. These are intended to help hardware and system designers arrive at optimal hardware software co-designs for applications of a given class. The reconfigurable computing devices thus designed, will be able to adapt the underlying hardware dynamically in response to changes in the input data or processing environment.

Original languageEnglish (US)
Title of host publicationProceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 03
EditorsT.P. Plaks, T.P. Plaks
Pages292-295
Number of pages4
StatePublished - Dec 1 2003
EventProceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'03 - Las Vegas, NV, United States
Duration: Jun 23 2003Jun 26 2003

Publication series

NameProceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms

Other

OtherProceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'03
CountryUnited States
CityLas Vegas, NV
Period6/23/036/26/03

Keywords

  • Control flow analysis
  • Dynamically reconfigurable

ASJC Scopus subject areas

  • Computer Science(all)
  • Theoretical Computer Science

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