Analyzing the energy-time trade-off in high-performance computing applications

Vincent W. Freeh, David K. Lowenthal, Feng Pan, Nandini Kappiah, Rob Springer, Barry L. Rountree, Mark E. Femal

Research output: Contribution to journalArticle

131 Scopus citations

Abstract

Although users of high-performance computing are most interested in raw performance, both energy and power consumption have become critical concerns. One approach to lowering energy and power is to use high-performance cluster nodes that have several power-performance states so that the energy-time trade-off can be dynamically adjusted. This paper analyzes the energy-time trade-off of a wide range of applications serial and parallel on a power-scalable cluster. We use a cluster of frequency and voltage-scalable AMD-64 nodes, each equipped with a power meter. We study the effects of memory and communication bottlenecks via direct measurement of time and energy. We also investigate metrics that can, at runtime, predict when each type of bottleneck occurs. Our results show that, for programs that have a memory or communication bottleneck, a power-scalable cluster can save significant energy with only a small time penalty. Furthermore, we find that, for some programs, it is possible to both consume less energy and execute in less time by increasing the number of nodes while reducing the frequency-voltage setting of each node.

Original languageEnglish (US)
Pages (from-to)835-848
Number of pages14
JournalIEEE Transactions on Parallel and Distributed Systems
Volume18
Issue number6
DOIs
StatePublished - Jun 1 2007
Externally publishedYes

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Keywords

  • High-performance computing
  • Power-aware computing

ASJC Scopus subject areas

  • Signal Processing
  • Hardware and Architecture
  • Computational Theory and Mathematics

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