Application specific reconfigurable architecture design

Ali Akoglu, S. Panchanathan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

A lookup table (LUT) based packing mechanism has been presented as part of the application specific reconfigurable architecture design methodology proposed in earlier work. In addition to routability driven cost metrics defined by other researchers, packing mechanism prioritizes nets that lead to reduction of input/output pins that are within the fan-in fan-out distance. Existing approaches treat the number of intersecting nets as positive gain during packing and ignore the wiring requirement growth within the cluster being formed. New packing algorithm employs average interconnection length estimation obtained through Rent's Rule in order to incorporate the wiring requirement into the cost function. This approach provides on average 28% reduction in number of nets and 26% reduction on number of tracks used compared to the state of the art approaches. Results will lead to significant amount of savings in switching complexity; hence contribute to reduction in power consumption and increase the processing speed.

Original languageEnglish (US)
Title of host publicationProceedings of the 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'05
Pages247-250
Number of pages4
StatePublished - 2005
Event2005 5th International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'05 - Las Vegas, NV, United States
Duration: Jun 27 2005Jun 30 2005

Other

Other2005 5th International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'05
CountryUnited States
CityLas Vegas, NV
Period6/27/056/30/05

Fingerprint

Reconfigurable architectures
Electric wiring
Table lookup
Cost functions
Fans
Electric power utilization
Processing
Costs

Keywords

  • Fpga
  • Look up table
  • Packing
  • Routing

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

Cite this

Akoglu, A., & Panchanathan, S. (2005). Application specific reconfigurable architecture design. In Proceedings of the 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'05 (pp. 247-250)

Application specific reconfigurable architecture design. / Akoglu, Ali; Panchanathan, S.

Proceedings of the 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'05. 2005. p. 247-250.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Akoglu, A & Panchanathan, S 2005, Application specific reconfigurable architecture design. in Proceedings of the 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'05. pp. 247-250, 2005 5th International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'05, Las Vegas, NV, United States, 6/27/05.
Akoglu A, Panchanathan S. Application specific reconfigurable architecture design. In Proceedings of the 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'05. 2005. p. 247-250
Akoglu, Ali ; Panchanathan, S. / Application specific reconfigurable architecture design. Proceedings of the 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'05. 2005. pp. 247-250
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