Architecture design of variable block size motion estimation for full and fast search algorithms in H.264/AVC

Xuanxing Xiong, Yang Song, Ali Akoglu

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

Fast search algorithms (FSA) used for variable block size motion estimation follow irregular search (data access) patterns. This poses as the main challenge in designing hardware architectures for them. In this study, we build a baseline architecture for fast search algorithms using state-of-the-art components available in academia. We improve its performance by introducing: (1) a super 2-dimensional (2-D) random access memory architecture for reading regular and interleaved two-rows or two-columns as opposed to one-row or one-column accessibility of the state of the art; (2) a 2-D processing element array with a tuned interconnect to support neighborhood connections required by the conventional fast search algorithms and to exploit on-chip data reuse. Results show that our design increases system throughput by up to 85.47%, and achieves power reduction by up to 13.83% with an area increase in the worst case by up to 65.53% compared to the baseline architecture.

Original languageEnglish (US)
Pages (from-to)285-299
Number of pages15
JournalComputers and Electrical Engineering
Volume37
Issue number3
DOIs
StatePublished - May 2011

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Motion estimation
Memory architecture
Throughput
Hardware
Processing

ASJC Scopus subject areas

  • Computer Science(all)
  • Electrical and Electronic Engineering
  • Control and Systems Engineering

Cite this

Architecture design of variable block size motion estimation for full and fast search algorithms in H.264/AVC. / Xiong, Xuanxing; Song, Yang; Akoglu, Ali.

In: Computers and Electrical Engineering, Vol. 37, No. 3, 05.2011, p. 285-299.

Research output: Contribution to journalArticle

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