Cluster based dynamic area-array I/O planning for flip chip technology

Kishore Kumar Muchherla, Jai Ganesh Kumar, Meiling Wang

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

With the recent advances in chip fabrication and the ever increasing demand for high performance circuits, the conventional peripheral I/O placement techniques fail to meet the stringent requirements of the chip design. As a result, the existing algorithms result in excessive wire length, long critical paths, and computationally expensive and intensive. In this paper we introduce a new area I/O placement technique that co-designs the chip and package. The present algorithm is non-iterative and constructive. It assigns the functional blocks and primary inputs/outputs simultaneously and considers the package imposed constraints during the planning stage. The algorithm progresses in stages. At each stage, the functional blocks are placed on the chip on the fly and grouped together to form clusters. Various criteria like primary input net span and adjacency of clusters are taken into consideration for the placement of functional blocks. Experimental results showed that due to the non-iterative property, the proposed algorithm achieved 10× speedup over the traditional algorithms while obtaining a planning solution with optimal wire length and minimized delay.

Original languageEnglish (US)
Pages (from-to)57-69
Number of pages13
JournalMicroelectronic Engineering
Volume114
DOIs
StatePublished - 2014

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planning
chips
Planning
wire
Wire
Fabrication
requirements
fabrication
Networks (circuits)
output

Keywords

  • Chip and package co-design
  • Flip-chip

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Surfaces, Coatings and Films
  • Atomic and Molecular Physics, and Optics
  • Condensed Matter Physics

Cite this

Cluster based dynamic area-array I/O planning for flip chip technology. / Muchherla, Kishore Kumar; Kumar, Jai Ganesh; Wang, Meiling.

In: Microelectronic Engineering, Vol. 114, 2014, p. 57-69.

Research output: Contribution to journalArticle

Muchherla, Kishore Kumar ; Kumar, Jai Ganesh ; Wang, Meiling. / Cluster based dynamic area-array I/O planning for flip chip technology. In: Microelectronic Engineering. 2014 ; Vol. 114. pp. 57-69.
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