Collision array based workload assignment for Network-on-Chip concurrency

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

To improve Network-on-Chip (NoC) parallelism, this paper proposes a new collision array based workload assignment to increase data request cancellation. Through a task flow partitioning algorithm, we minimize sequential data access and then dynamically schedule tasks while minimizing router execution time. Experimental results show that this method can provide an average of 87.7% system throughput improvement and 41.4% router execution time reduction. This throughput improvement is the direct consequence of collision array. A 7x improvement was reported in [10] Fig. 7 when 32 threads are employed on a single core. The system can achieve 2.7 times of speedup. By investigating the performance-overhead tradeoff between different collision array sizes, we proved a maximum of 42.9% energy and area overheads saving, only with a cost of 23.6% performance degradation in term of router execution time.

Original languageEnglish (US)
Title of host publicationInternational System on Chip Conference
EditorsRamalingam Sridhar, Danella Zhao, Kaijian Shi, Thomas Buchner
PublisherIEEE Computer Society
Pages188-191
Number of pages4
ISBN (Electronic)9781479933785
DOIs
StatePublished - Nov 5 2014
Event27th IEEE International System on Chip Conference, SOCC 2014 - Las Vegas, United States
Duration: Sep 2 2014Sep 5 2014

Publication series

NameInternational System on Chip Conference
ISSN (Print)2164-1676
ISSN (Electronic)2164-1706

Other

Other27th IEEE International System on Chip Conference, SOCC 2014
CountryUnited States
CityLas Vegas
Period9/2/149/5/14

Keywords

  • Network-on-Chip system
  • collision array
  • parallelism
  • workload assignment

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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