Delay-hiding energy management mechanisms for DRAM

Mingsong Bi, Ran Duan, Christopher Gniady

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Citations (Scopus)

Abstract

Current trends in data-intensive applications increase the demand for larger physical memory, resulting in the memory subsystem consuming a significant portion of system's energy. Furthermore, data-intensive applications heavily rely on a large buffer cache that occupies a majority of physical memory. Subsequently, we are focusing on the power management for physical memory dedicated to the buffer cache. Several techniques have been proposed to reduce energy consumption by transitioning DRAM into low-power states. However, transitions between different power states incur delays and may affect whole system performance. We take advantage of the I/O handling routines in the OS kernel to hide the delay incurred by the memory state transition so that performance degradation is minimized while maintaining high memory energy savings. Our evaluation shows that the best of the proposed mechanisms hides almost all transition latencies while only consuming 3% more energy as compared to the existing on-demand mechanism, which can expose significant delays.

Original languageEnglish (US)
Title of host publicationProceedings - International Symposium on High-Performance Computer Architecture
StatePublished - 2010
Event16th International Symposium on High-Performance Computer Architecture, HPCA-16 2010 - Bangalore, India
Duration: Jan 9 2010Jan 14 2010

Other

Other16th International Symposium on High-Performance Computer Architecture, HPCA-16 2010
CountryIndia
CityBangalore
Period1/9/101/14/10

Fingerprint

Dynamic random access storage
Energy management
Data storage equipment
Energy conservation
Energy utilization
Degradation

ASJC Scopus subject areas

  • Hardware and Architecture

Cite this

Bi, M., Duan, R., & Gniady, C. (2010). Delay-hiding energy management mechanisms for DRAM. In Proceedings - International Symposium on High-Performance Computer Architecture [5416646]

Delay-hiding energy management mechanisms for DRAM. / Bi, Mingsong; Duan, Ran; Gniady, Christopher.

Proceedings - International Symposium on High-Performance Computer Architecture. 2010. 5416646.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bi, M, Duan, R & Gniady, C 2010, Delay-hiding energy management mechanisms for DRAM. in Proceedings - International Symposium on High-Performance Computer Architecture., 5416646, 16th International Symposium on High-Performance Computer Architecture, HPCA-16 2010, Bangalore, India, 1/9/10.
Bi M, Duan R, Gniady C. Delay-hiding energy management mechanisms for DRAM. In Proceedings - International Symposium on High-Performance Computer Architecture. 2010. 5416646
Bi, Mingsong ; Duan, Ran ; Gniady, Christopher. / Delay-hiding energy management mechanisms for DRAM. Proceedings - International Symposium on High-Performance Computer Architecture. 2010.
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