Design of a high-speed optical interconnect for scalable shared-memory multiprocessors

Avinash Karanth Kodi, Ahmed Louri

Research output: Contribution to journalArticle

26 Citations (Scopus)

Abstract

The architecture proposed here reduces remote memory access latency by increasing connectivity and maximizing channel availability for remote communication. It also provides efficient and fast unicast, multicast, and broadcast capabilities, using a combination of aggressively designed multiplexing techniques. Simulations show that this architecture provides excellent interconnect support for a highly scalable, high-bandwidth, low-latency network.

Original languageEnglish (US)
Pages (from-to)41-49
Number of pages9
JournalIEEE Micro
Volume25
Issue number1
DOIs
StatePublished - Jan 2005

Fingerprint

Optical interconnects
Multiplexing
Availability
Bandwidth
Data storage equipment
Communication

ASJC Scopus subject areas

  • Hardware and Architecture
  • Computer Graphics and Computer-Aided Design
  • Software

Cite this

Design of a high-speed optical interconnect for scalable shared-memory multiprocessors. / Kodi, Avinash Karanth; Louri, Ahmed.

In: IEEE Micro, Vol. 25, No. 1, 01.2005, p. 41-49.

Research output: Contribution to journalArticle

@article{af94b92fcbd04229ad04e73b66ccdd1e,
title = "Design of a high-speed optical interconnect for scalable shared-memory multiprocessors",
abstract = "The architecture proposed here reduces remote memory access latency by increasing connectivity and maximizing channel availability for remote communication. It also provides efficient and fast unicast, multicast, and broadcast capabilities, using a combination of aggressively designed multiplexing techniques. Simulations show that this architecture provides excellent interconnect support for a highly scalable, high-bandwidth, low-latency network.",
author = "Kodi, {Avinash Karanth} and Ahmed Louri",
year = "2005",
month = "1",
doi = "10.1109/MM.2005.7",
language = "English (US)",
volume = "25",
pages = "41--49",
journal = "IEEE Micro",
issn = "0272-1732",
publisher = "IEEE Computer Society",
number = "1",

}

TY - JOUR

T1 - Design of a high-speed optical interconnect for scalable shared-memory multiprocessors

AU - Kodi, Avinash Karanth

AU - Louri, Ahmed

PY - 2005/1

Y1 - 2005/1

N2 - The architecture proposed here reduces remote memory access latency by increasing connectivity and maximizing channel availability for remote communication. It also provides efficient and fast unicast, multicast, and broadcast capabilities, using a combination of aggressively designed multiplexing techniques. Simulations show that this architecture provides excellent interconnect support for a highly scalable, high-bandwidth, low-latency network.

AB - The architecture proposed here reduces remote memory access latency by increasing connectivity and maximizing channel availability for remote communication. It also provides efficient and fast unicast, multicast, and broadcast capabilities, using a combination of aggressively designed multiplexing techniques. Simulations show that this architecture provides excellent interconnect support for a highly scalable, high-bandwidth, low-latency network.

UR - http://www.scopus.com/inward/record.url?scp=17644373041&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=17644373041&partnerID=8YFLogxK

U2 - 10.1109/MM.2005.7

DO - 10.1109/MM.2005.7

M3 - Article

AN - SCOPUS:17644373041

VL - 25

SP - 41

EP - 49

JO - IEEE Micro

JF - IEEE Micro

SN - 0272-1732

IS - 1

ER -