Evaluation of the complexity of automated trace alignment using novel power obfuscation methods

Bozhi Liu, Kemeng Chen, Minjun Seo, Meiling Wang, Roman L Lysecky

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a methodology for evaluating power obfuscation approaches that seek to obfuscate the location of sensitive operations in the power trace, thereby increasing the complexity of automated trace alignment. The paper presents a new adversary model and proposes a new metric, mean trials to success (MTTS), to evaluate power obfuscation methods in the context of automated trace alignment. We evaluate two common obfuscation methods, namely instruction shuffling and random instruction insertion, and we present a new obfuscation method using power shaping to intentionally mislead the attacker.

Original languageEnglish (US)
Title of host publicationGLSVLSI 2018 - Proceedings of the 2018 Great Lakes Symposium on VLSI
PublisherAssociation for Computing Machinery
Pages467-470
Number of pages4
VolumePart F137141
ISBN (Electronic)9781450357241
DOIs
Publication statusPublished - May 30 2018
Event28th Great Lakes Symposium on VLSI, GLSVLSI 2018 - Chicago, United States
Duration: May 23 2018May 25 2018

Other

Other28th Great Lakes Symposium on VLSI, GLSVLSI 2018
CountryUnited States
CityChicago
Period5/23/185/25/18

Keywords

  • Automated trace alignment
  • Embedded systems
  • Power obfuscation
  • Power shaping
  • Side channel attacks

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Liu, B., Chen, K., Seo, M., Wang, M., & Lysecky, R. L. (2018). Evaluation of the complexity of automated trace alignment using novel power obfuscation methods. In GLSVLSI 2018 - Proceedings of the 2018 Great Lakes Symposium on VLSI (Vol. Part F137141, pp. 467-470). Association for Computing Machinery. https://doi.org/10.1145/3194554.3194640