Failure analysis of two-bit flipping decoding algorithms

Bane V Vasic, Dung Viet Nguyen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

We consider a class of bit flipping algorithms for low-density parity-check codes over the binary symmetric channel in which one additional bit at a variable and check nodes is employed. For these two-bit flipping algorithms, we give and illustrate through examples a recursive procedure for finding all uncorrectable error patters and corresponding induced subgraphs, referred as a trapping set profile. This procedure is used to select a small collection of good algorithms that in a decoding diversity approach, run in parallel or serial, outperform Gallager A/B, min-sum and sum product algorithm in the error floor region.

Original languageEnglish (US)
Title of host publication2014 International Conference on Signal Processing and Communications, SPCOM 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781479946655
DOIs
StatePublished - Dec 12 2014
Event10th International Conference on Signal Processing and Communications, SPCOM 2014 - Bangalore, India
Duration: Jul 22 2014Jul 25 2014

Other

Other10th International Conference on Signal Processing and Communications, SPCOM 2014
CountryIndia
CityBangalore
Period7/22/147/25/14

Fingerprint

Failure analysis
Decoding

Keywords

  • Bit flipping algorithms
  • error floor
  • low-density parity-check codes
  • trapping set

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Signal Processing

Cite this

Vasic, B. V., & Nguyen, D. V. (2014). Failure analysis of two-bit flipping decoding algorithms. In 2014 International Conference on Signal Processing and Communications, SPCOM 2014 [6983914] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SPCOM.2014.6983914

Failure analysis of two-bit flipping decoding algorithms. / Vasic, Bane V; Nguyen, Dung Viet.

2014 International Conference on Signal Processing and Communications, SPCOM 2014. Institute of Electrical and Electronics Engineers Inc., 2014. 6983914.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Vasic, BV & Nguyen, DV 2014, Failure analysis of two-bit flipping decoding algorithms. in 2014 International Conference on Signal Processing and Communications, SPCOM 2014., 6983914, Institute of Electrical and Electronics Engineers Inc., 10th International Conference on Signal Processing and Communications, SPCOM 2014, Bangalore, India, 7/22/14. https://doi.org/10.1109/SPCOM.2014.6983914
Vasic BV, Nguyen DV. Failure analysis of two-bit flipping decoding algorithms. In 2014 International Conference on Signal Processing and Communications, SPCOM 2014. Institute of Electrical and Electronics Engineers Inc. 2014. 6983914 https://doi.org/10.1109/SPCOM.2014.6983914
Vasic, Bane V ; Nguyen, Dung Viet. / Failure analysis of two-bit flipping decoding algorithms. 2014 International Conference on Signal Processing and Communications, SPCOM 2014. Institute of Electrical and Electronics Engineers Inc., 2014.
@inproceedings{56eb3bf866294196a65e40ec12f31899,
title = "Failure analysis of two-bit flipping decoding algorithms",
abstract = "We consider a class of bit flipping algorithms for low-density parity-check codes over the binary symmetric channel in which one additional bit at a variable and check nodes is employed. For these two-bit flipping algorithms, we give and illustrate through examples a recursive procedure for finding all uncorrectable error patters and corresponding induced subgraphs, referred as a trapping set profile. This procedure is used to select a small collection of good algorithms that in a decoding diversity approach, run in parallel or serial, outperform Gallager A/B, min-sum and sum product algorithm in the error floor region.",
keywords = "Bit flipping algorithms, error floor, low-density parity-check codes, trapping set",
author = "Vasic, {Bane V} and Nguyen, {Dung Viet}",
year = "2014",
month = "12",
day = "12",
doi = "10.1109/SPCOM.2014.6983914",
language = "English (US)",
isbn = "9781479946655",
booktitle = "2014 International Conference on Signal Processing and Communications, SPCOM 2014",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - Failure analysis of two-bit flipping decoding algorithms

AU - Vasic, Bane V

AU - Nguyen, Dung Viet

PY - 2014/12/12

Y1 - 2014/12/12

N2 - We consider a class of bit flipping algorithms for low-density parity-check codes over the binary symmetric channel in which one additional bit at a variable and check nodes is employed. For these two-bit flipping algorithms, we give and illustrate through examples a recursive procedure for finding all uncorrectable error patters and corresponding induced subgraphs, referred as a trapping set profile. This procedure is used to select a small collection of good algorithms that in a decoding diversity approach, run in parallel or serial, outperform Gallager A/B, min-sum and sum product algorithm in the error floor region.

AB - We consider a class of bit flipping algorithms for low-density parity-check codes over the binary symmetric channel in which one additional bit at a variable and check nodes is employed. For these two-bit flipping algorithms, we give and illustrate through examples a recursive procedure for finding all uncorrectable error patters and corresponding induced subgraphs, referred as a trapping set profile. This procedure is used to select a small collection of good algorithms that in a decoding diversity approach, run in parallel or serial, outperform Gallager A/B, min-sum and sum product algorithm in the error floor region.

KW - Bit flipping algorithms

KW - error floor

KW - low-density parity-check codes

KW - trapping set

UR - http://www.scopus.com/inward/record.url?scp=84920722404&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84920722404&partnerID=8YFLogxK

U2 - 10.1109/SPCOM.2014.6983914

DO - 10.1109/SPCOM.2014.6983914

M3 - Conference contribution

AN - SCOPUS:84920722404

SN - 9781479946655

BT - 2014 International Conference on Signal Processing and Communications, SPCOM 2014

PB - Institute of Electrical and Electronics Engineers Inc.

ER -