Abstract
While hardware/software partitioning has been shown to provide significant performance gains, most hardware/software partitioning approaches are limited to partitioning computational kernels utilizing integers or fixed point implementations. Software developers often initially develop an application using floating point representations built-in to most programming languages and later convert the application to a fixed point representation-a potentially time consuming process. In this paper, we present the Arizona Float ⇔ Fixed Hardware Library (AFFHL) consisting of efficient, configurable floating point to fixed point and fixed point to floating point hardware converters. By utilizing these converters, a system's hardware/software implementation can be separated into a floating point domain consisting of the microprocessor and memory subsystem and a fixed point domain consisting of one or more partitioned hardware coprocessors. This separation enables a rapid hardware/software partitioning approach in which floating point software kernels can be implemented using fixed point hardware coprocessors without the need for application developers to first rewrite software applications as fixed point implementations. We further present an overview of a basic hardware/software partitioning methodology for rapidly partitioning computational kernels within floating point software application to either statically determined fixed point hardware coprocessors or dynamically adaptable fixed point hardware coprocessors in which the required fixed point representation can be dynamically determined and adjusted at runtime.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 139-157 |
| Number of pages | 19 |
| Journal | Design Automation for Embedded Systems |
| Volume | 13 |
| Issue number | 3 |
| DOIs | |
| State | Published - Sep 2009 |
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Keywords
- Dynamically adaptable
- Fixed point
- Floating point
- Floating point to fixed conversion
- Hardware/software partitioning
ASJC Scopus subject areas
- Hardware and Architecture
- Software
Cite this
Float-to-fixed and fixed-to-float hardware converters for rapid hardware/software partitioning of floating point software applications to static and dynamic fixed point coprocessors. / Saldanha, Lance; Lysecky, Roman L.
In: Design Automation for Embedded Systems, Vol. 13, No. 3, 09.2009, p. 139-157.Research output: Contribution to journal › Article
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TY - JOUR
T1 - Float-to-fixed and fixed-to-float hardware converters for rapid hardware/software partitioning of floating point software applications to static and dynamic fixed point coprocessors
AU - Saldanha, Lance
AU - Lysecky, Roman L
PY - 2009/9
Y1 - 2009/9
N2 - While hardware/software partitioning has been shown to provide significant performance gains, most hardware/software partitioning approaches are limited to partitioning computational kernels utilizing integers or fixed point implementations. Software developers often initially develop an application using floating point representations built-in to most programming languages and later convert the application to a fixed point representation-a potentially time consuming process. In this paper, we present the Arizona Float ⇔ Fixed Hardware Library (AFFHL) consisting of efficient, configurable floating point to fixed point and fixed point to floating point hardware converters. By utilizing these converters, a system's hardware/software implementation can be separated into a floating point domain consisting of the microprocessor and memory subsystem and a fixed point domain consisting of one or more partitioned hardware coprocessors. This separation enables a rapid hardware/software partitioning approach in which floating point software kernels can be implemented using fixed point hardware coprocessors without the need for application developers to first rewrite software applications as fixed point implementations. We further present an overview of a basic hardware/software partitioning methodology for rapidly partitioning computational kernels within floating point software application to either statically determined fixed point hardware coprocessors or dynamically adaptable fixed point hardware coprocessors in which the required fixed point representation can be dynamically determined and adjusted at runtime.
AB - While hardware/software partitioning has been shown to provide significant performance gains, most hardware/software partitioning approaches are limited to partitioning computational kernels utilizing integers or fixed point implementations. Software developers often initially develop an application using floating point representations built-in to most programming languages and later convert the application to a fixed point representation-a potentially time consuming process. In this paper, we present the Arizona Float ⇔ Fixed Hardware Library (AFFHL) consisting of efficient, configurable floating point to fixed point and fixed point to floating point hardware converters. By utilizing these converters, a system's hardware/software implementation can be separated into a floating point domain consisting of the microprocessor and memory subsystem and a fixed point domain consisting of one or more partitioned hardware coprocessors. This separation enables a rapid hardware/software partitioning approach in which floating point software kernels can be implemented using fixed point hardware coprocessors without the need for application developers to first rewrite software applications as fixed point implementations. We further present an overview of a basic hardware/software partitioning methodology for rapidly partitioning computational kernels within floating point software application to either statically determined fixed point hardware coprocessors or dynamically adaptable fixed point hardware coprocessors in which the required fixed point representation can be dynamically determined and adjusted at runtime.
KW - Dynamically adaptable
KW - Fixed point
KW - Floating point
KW - Floating point to fixed conversion
KW - Hardware/software partitioning
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U2 - 10.1007/s10617-009-9044-4
DO - 10.1007/s10617-009-9044-4
M3 - Article
AN - SCOPUS:70350068284
VL - 13
SP - 139
EP - 157
JO - Design Automation for Embedded Systems
JF - Design Automation for Embedded Systems
SN - 0929-5585
IS - 3
ER -