FPGA implementation of high performance QC-LDPC decoder for optical communications

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Forward error correction is as one of the key technologies enabling the next-generation high-speed fiber optical communications. Quasi-cyclic (QC) low-density parity-check (LDPC) codes have been considered as one of the promising candidates due to their large coding gain performance and low implementation complexity. In this paper, we present our designed QC-LDPC code with girth 10 and 25% overhead based on pairwise balanced design. By FPGAbased emulation, we demonstrate that the 5-bit soft-decision LDPC decoder can achieve 11.8dB net coding gain with no error floor at BER of 10-15avoiding using any outer code or post-processing method. We believe that the proposed single QC-LDPC code is a promising solution for 400Gb/s optical communication systems and beyond.

Original languageEnglish (US)
Title of host publicationProceedings of SPIE - The International Society for Optical Engineering
PublisherSPIE
Volume9388
ISBN (Print)9781628414783
DOIs
StatePublished - 2015
EventOptical Metro Networks and Short-Haul Systems VII - San Francisco, United States
Duration: Feb 10 2015Feb 12 2015

Other

OtherOptical Metro Networks and Short-Haul Systems VII
CountryUnited States
CitySan Francisco
Period2/10/152/12/15

Fingerprint

Quasi-cyclic Codes
Optical fiber communication
FPGA Implementation
Forward error correction
Low-density Parity-check (LDPC) Codes
Optical Communication
decoders
Optical communication
Parity
optical communication
Field programmable gate arrays (FPGA)
Coding Gain
Communication systems
parity
High Performance
Processing
Pairwise Balanced Design
Optical Fiber Communication
coding
Emulation

Keywords

  • Fiber-optics communications
  • Low-density parity-check (LDPC) codes

ASJC Scopus subject areas

  • Applied Mathematics
  • Computer Science Applications
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics

Cite this

Zou, D., & Djordjevic, I. B. (2015). FPGA implementation of high performance QC-LDPC decoder for optical communications. In Proceedings of SPIE - The International Society for Optical Engineering (Vol. 9388). [93880P] SPIE. https://doi.org/10.1117/12.2080735

FPGA implementation of high performance QC-LDPC decoder for optical communications. / Zou, Ding; Djordjevic, Ivan B.

Proceedings of SPIE - The International Society for Optical Engineering. Vol. 9388 SPIE, 2015. 93880P.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Zou, D & Djordjevic, IB 2015, FPGA implementation of high performance QC-LDPC decoder for optical communications. in Proceedings of SPIE - The International Society for Optical Engineering. vol. 9388, 93880P, SPIE, Optical Metro Networks and Short-Haul Systems VII, San Francisco, United States, 2/10/15. https://doi.org/10.1117/12.2080735
Zou D, Djordjevic IB. FPGA implementation of high performance QC-LDPC decoder for optical communications. In Proceedings of SPIE - The International Society for Optical Engineering. Vol. 9388. SPIE. 2015. 93880P https://doi.org/10.1117/12.2080735
Zou, Ding ; Djordjevic, Ivan B. / FPGA implementation of high performance QC-LDPC decoder for optical communications. Proceedings of SPIE - The International Society for Optical Engineering. Vol. 9388 SPIE, 2015.
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