Low-impedance load detector circuit for optical interconnects

Yang Tung Huang, Raymond K Kostuk

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Optical interconnects provide an alternative for long-distance electrical clock distribution in high-speed VLSI circuits. In an optical interconnect system, the response of the detector circuit is an important factor in determining the speed of the overall system. A simple, low-impedance nMOS detector circuit is presented and modeled for optical interconnect application in CMOS systems. A maximum-current parameter is defined and optimized to improve the circuit response. For 0.5-mW optical input power and a 25-μm-diameter detector, response times of 2.2, 1.1, and 0.8 ns can be achieved with typical 2.0-, 1.0-, and 0.5-μm technologies. With higher optical power or a smaller detector diameter, the response is faster. Analytical results, SPICE simulations, and preliminary experimental results are illustrated and discussed.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Editors Anon
PublisherPubl by IEEE
Pages66-71
Number of pages6
StatePublished - 1989
EventProceedings - 1989 IEEE International Conference on Computer Design: VLSI in Computers & Processors - Cambridge, MA, USA
Duration: Oct 2 1989Oct 4 1989

Other

OtherProceedings - 1989 IEEE International Conference on Computer Design: VLSI in Computers & Processors
CityCambridge, MA, USA
Period10/2/8910/4/89

Fingerprint

Detector circuits
Optical interconnects
Detectors
VLSI circuits
SPICE
Clocks
Networks (circuits)

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Engineering(all)

Cite this

Huang, Y. T., & Kostuk, R. K. (1989). Low-impedance load detector circuit for optical interconnects. In Anon (Ed.), Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors (pp. 66-71). Publ by IEEE.

Low-impedance load detector circuit for optical interconnects. / Huang, Yang Tung; Kostuk, Raymond K.

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. ed. / Anon. Publ by IEEE, 1989. p. 66-71.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Huang, YT & Kostuk, RK 1989, Low-impedance load detector circuit for optical interconnects. in Anon (ed.), Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. Publ by IEEE, pp. 66-71, Proceedings - 1989 IEEE International Conference on Computer Design: VLSI in Computers & Processors, Cambridge, MA, USA, 10/2/89.
Huang YT, Kostuk RK. Low-impedance load detector circuit for optical interconnects. In Anon, editor, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. Publ by IEEE. 1989. p. 66-71
Huang, Yang Tung ; Kostuk, Raymond K. / Low-impedance load detector circuit for optical interconnects. Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. editor / Anon. Publ by IEEE, 1989. pp. 66-71
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