Low-power warp processor for power efficient high-performance embedded systems

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Scopus citations

Abstract

Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels within the software as custom hardware circuits in an on-chip FPGA. However, the original warp processor design was primarily performance-driven and did not focus on power consumption, which is becoming an increasingly important design constraint. Focusing on power consumption, we present an alternative low-power warp processor design and methodology that can dynamically and transparently reduce power consumption of an executing application with no degradation in system performance, achieving an average reduction in power consumption of 74%. We further demonstrate the flexibility of this approach to provide dynamic control between high-performance and low-power consumption.

Original languageEnglish (US)
Title of host publicationProceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007
Pages141-146
Number of pages6
DOIs
StatePublished - Sep 4 2007
Event2007 Design, Automation and Test in Europe Conference and Exhibition - Nice Acropolis, France
Duration: Apr 16 2007Apr 20 2007

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591

Other

Other2007 Design, Automation and Test in Europe Conference and Exhibition
CountryFrance
CityNice Acropolis
Period4/16/074/20/07

Keywords

  • Dynamically adaptable systems
  • Embedded systems
  • Hardware/software partitioning
  • Low-power
  • Warp processing

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Lysecky, R. (2007). Low-power warp processor for power efficient high-performance embedded systems. In Proceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007 (pp. 141-146). [4211786] (Proceedings -Design, Automation and Test in Europe, DATE). https://doi.org/10.1109/DATE.2007.364581