On-chip logic minimization

Roman L Lysecky, Frank Vahid

Research output: Chapter in Book/Report/Conference proceedingConference contribution

28 Citations (Scopus)

Abstract

While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such as Internet Protocol routing table and network access control list reduction, require logic minimization during the application's runtime, and hence could benefit from minimization executing on-chip alongside the application. On-chip minimization can even enable dynamic hardware/software partitioning. We discuss requirements of on-chip logic minimization, and present our new on-chip logic minimization tool, ROCM. We compare with the well-known Espresso logic minimizer and show that ROCM is 10 times smaller, executes 10-20 times faster, and uses 3 times less data memory, with a mere 2% quality penalty, for the routing table and access control list applications. We show that ROCM solves real-sized problems on an ARM7 embedded processor in just seconds.

Original languageEnglish (US)
Title of host publicationProceedings - Design Automation Conference
Pages334-337
Number of pages4
StatePublished - 2003
Externally publishedYes
EventProceedings of the 40th Design Automation Conference - Anaheim, CA, United States
Duration: Jun 2 2003Jun 6 2003

Other

OtherProceedings of the 40th Design Automation Conference
CountryUnited States
CityAnaheim, CA
Period6/2/036/6/03

Fingerprint

Access control
Internet protocols
Hardware
Data storage equipment
Logic Synthesis

Keywords

  • Dynamic optimization
  • Embedded systems
  • Logic minimization
  • On-chip logic minimization
  • On-chip synthesis
  • System-on-a-chip

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering

Cite this

Lysecky, R. L., & Vahid, F. (2003). On-chip logic minimization. In Proceedings - Design Automation Conference (pp. 334-337)

On-chip logic minimization. / Lysecky, Roman L; Vahid, Frank.

Proceedings - Design Automation Conference. 2003. p. 334-337.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lysecky, RL & Vahid, F 2003, On-chip logic minimization. in Proceedings - Design Automation Conference. pp. 334-337, Proceedings of the 40th Design Automation Conference, Anaheim, CA, United States, 6/2/03.
Lysecky RL, Vahid F. On-chip logic minimization. In Proceedings - Design Automation Conference. 2003. p. 334-337
Lysecky, Roman L ; Vahid, Frank. / On-chip logic minimization. Proceedings - Design Automation Conference. 2003. pp. 334-337
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