Performance of taylor-kuznetsov memories under timing errors

Elsa Dupraz, Bane V Vasic, David Declercq

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Lowering the power supply of a circuit can induce transient errors in the memory cells and timing errors in the computation units. In this paper, we consider the Taylor-Kuznetsov (TK) memory architecture with transient errors in the memory cells and with timing errors in the correction circuit. We provide a theoretical analysis of the performance of TK memories under transient errors and timing errors. Our study is based on the analysis of the computation trees of the equivalent Gallager B decoders with and without timing errors. As a main result, we show that as the number of iterations goes to infinity, the error probability of the decoder with timing errors converges to the error probability of the decoder without timing errors. Monte Carlo simulations confirm this result even for moderate code lengths.

Original languageEnglish (US)
Title of host publication2017 IEEE International Conference on Communications, ICC 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467389990
DOIs
StatePublished - Jul 28 2017
Event2017 IEEE International Conference on Communications, ICC 2017 - Paris, France
Duration: May 21 2017May 25 2017

Other

Other2017 IEEE International Conference on Communications, ICC 2017
CountryFrance
CityParis
Period5/21/175/25/17

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Data storage equipment
Memory architecture
Networks (circuits)

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

Cite this

Dupraz, E., Vasic, B. V., & Declercq, D. (2017). Performance of taylor-kuznetsov memories under timing errors. In 2017 IEEE International Conference on Communications, ICC 2017 [7996548] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICC.2017.7996548

Performance of taylor-kuznetsov memories under timing errors. / Dupraz, Elsa; Vasic, Bane V; Declercq, David.

2017 IEEE International Conference on Communications, ICC 2017. Institute of Electrical and Electronics Engineers Inc., 2017. 7996548.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Dupraz, E, Vasic, BV & Declercq, D 2017, Performance of taylor-kuznetsov memories under timing errors. in 2017 IEEE International Conference on Communications, ICC 2017., 7996548, Institute of Electrical and Electronics Engineers Inc., 2017 IEEE International Conference on Communications, ICC 2017, Paris, France, 5/21/17. https://doi.org/10.1109/ICC.2017.7996548
Dupraz E, Vasic BV, Declercq D. Performance of taylor-kuznetsov memories under timing errors. In 2017 IEEE International Conference on Communications, ICC 2017. Institute of Electrical and Electronics Engineers Inc. 2017. 7996548 https://doi.org/10.1109/ICC.2017.7996548
Dupraz, Elsa ; Vasic, Bane V ; Declercq, David. / Performance of taylor-kuznetsov memories under timing errors. 2017 IEEE International Conference on Communications, ICC 2017. Institute of Electrical and Electronics Engineers Inc., 2017.
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