Photonic switching for reliable nanoscale three-dimensional integrated network-on-chips

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

As the multi-core architecture is becoming a prevailing high-performance chip design approach, power efficiency, limited bandwidth and low reliability have been recognized as major communication bottlenecks for on-chip networks (NOCs). To simultaneously tackle the above problems, we propose a three-dimensional integrated (3DI) photonic NOC architecture. This architecture is composed of the following layers: (i) the multi-core processor layer that host multiple heterogeneous processing cores together with corresponding local memories and network interfaces, (ii) multiple 3D memory layers that provide the bulk of on-chip memory, and (iii) photonic NOC layer. The photonic NOC layer is based on the optical cross-point switches (OXSs) implemented using active vertical coupler (AVC) structures. The use of this photonic NOC layer will provide ample bandwidth at reduced latencies along with low power consumption. The nanoscale photonic NOCs are sensitive to process variation and reliability issues. To deal with these problems, we proposed the use of LDPC codes with decoding based on simple majority-logic.

Original languageEnglish (US)
Title of host publicationProceedings of SPIE - The International Society for Optical Engineering
Volume7944
DOIs
StatePublished - 2011
EventOptoelectronic Interconnects and Component Integration XI - San Francisco, CA, United States
Duration: Jan 24 2011Jan 26 2011

Other

OtherOptoelectronic Interconnects and Component Integration XI
CountryUnited States
CitySan Francisco, CA
Period1/24/111/26/11

Fingerprint

optical switching
Photonics
chips
Three-dimensional
photonics
Data storage equipment
Majority logic
Chip
Bandwidth
bandwidth
LDPC Codes
Process Variation
Multi-core Processor
Coupler
Interfaces (computer)
power efficiency
decoding
Decoding
Electric power utilization
couplers

Keywords

  • Integrated optics and optoelectronics
  • Low-density parity-check (LDPC) codes
  • Majority-logic decoding
  • Nano-photonics
  • Network-on-chips
  • Optical switching
  • Silicon photonics

ASJC Scopus subject areas

  • Applied Mathematics
  • Computer Science Applications
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics

Cite this

Djordjevic, I. B. (2011). Photonic switching for reliable nanoscale three-dimensional integrated network-on-chips. In Proceedings of SPIE - The International Society for Optical Engineering (Vol. 7944). [79440U] https://doi.org/10.1117/12.873322

Photonic switching for reliable nanoscale three-dimensional integrated network-on-chips. / Djordjevic, Ivan B.

Proceedings of SPIE - The International Society for Optical Engineering. Vol. 7944 2011. 79440U.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Djordjevic, IB 2011, Photonic switching for reliable nanoscale three-dimensional integrated network-on-chips. in Proceedings of SPIE - The International Society for Optical Engineering. vol. 7944, 79440U, Optoelectronic Interconnects and Component Integration XI, San Francisco, CA, United States, 1/24/11. https://doi.org/10.1117/12.873322
Djordjevic IB. Photonic switching for reliable nanoscale three-dimensional integrated network-on-chips. In Proceedings of SPIE - The International Society for Optical Engineering. Vol. 7944. 2011. 79440U https://doi.org/10.1117/12.873322
Djordjevic, Ivan B. / Photonic switching for reliable nanoscale three-dimensional integrated network-on-chips. Proceedings of SPIE - The International Society for Optical Engineering. Vol. 7944 2011.
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