Predicting analog circuit performance based on importance of uncertainties

Jin Sun, Kiran Potluri, Meiling Wang

Research output: Contribution to journalArticle

Abstract

With the scaling down of CMOS devices, process variation is becoming the leading cause of CMOS based analog circuit failures. For example, a mere 5% variation in feature size can trigger circuit failure. Various methods such as Monte-Carlo and corner-based verification help predict variation caused problems at the expense of thousands of simulations before capturing the problem. This paper presents a new methodology for analog circuit performance prediction. The new method first applies statistical uncertainty analysis on all associated devices in the circuit. By evaluating the uncertainty importance of parameter variability, it approximates the circuit with only components that are most critical to output results. Applying Chebyshev Affine Arithmetic (CAA) on the resulting system provides both performance bounds and probability information in time domain and frequency domain.

Original languageEnglish (US)
Pages (from-to)893-904
Number of pages12
JournalIEICE Transactions on Electronics
VolumeE93-C
Issue number6
DOIs
StatePublished - Jun 2010

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Analog circuits
Trigger circuits
Uncertainty analysis
Networks (circuits)
Uncertainty

Keywords

  • Chebyshev affine arithmetic
  • Process variations
  • Statistical propagation of variance
  • Uncertainty importance

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Predicting analog circuit performance based on importance of uncertainties. / Sun, Jin; Potluri, Kiran; Wang, Meiling.

In: IEICE Transactions on Electronics, Vol. E93-C, No. 6, 06.2010, p. 893-904.

Research output: Contribution to journalArticle

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