Profiling and online system-level performance and power estimation for dynamically adaptable embedded systems

Jingqing Mu, Karthik Shankar, Roman L Lysecky

Research output: Contribution to journalArticle

4 Citations (Scopus)

Abstract

Significant research has demonstrated the performance and power benefits of runtime dynamic reconfiguration of FPGAs and microprocessor/FPGA devices. For dynamically reconfigurable systems, in which the selection of hardware coprocessors to implement within the FPGA is determined at runtime, online estimation methods are needed to evaluate the performance and power consumption impact of the hardware coprocessor selection. In this paper, we present a profile assisted online system-level performance and power estimation framework for estimating the speedup and power consumption of dynamically reconfigurable embedded systems. We evaluate the accuracy and fidelity of our online estimation framework for dynamic hardware kernel selection to maximize performance or minimize the system power consumption.

Original languageEnglish (US)
Article number85
JournalTransactions on Embedded Computing Systems
Volume12
Issue number3
DOIs
StatePublished - Mar 2013

Fingerprint

Online systems
Embedded systems
Field programmable gate arrays (FPGA)
Electric power utilization
Hardware
Microprocessor chips
Coprocessor

Keywords

  • Dynamic hardware/software partitioning
  • Dynamically adaptable systems
  • Embedded systems
  • Non-intrusive profiling
  • Online estimation
  • Performance and power estimation

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software

Cite this

Profiling and online system-level performance and power estimation for dynamically adaptable embedded systems. / Mu, Jingqing; Shankar, Karthik; Lysecky, Roman L.

In: Transactions on Embedded Computing Systems, Vol. 12, No. 3, 85, 03.2013.

Research output: Contribution to journalArticle

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