Rinsing of high-aspect-ratio features on patterned wafers

Chieh Chun Chiang, Jivaan Kishore, Srini Raghavan, Farhang Shadman

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

A comprehensive process model is developed to simulate the mechanism and the dynamics of rinsing and cleaning of deep and narrow structures on patterned substrates. This process is critical in a number of applications such as post-etch cleaning of patterned wafers during the manufacturing of semiconductor devices. The model takes into account various mass transport mechanisms including convection and diffusion/dispersion that occur simultaneously with various surface interactions such as adsorption and desorption of impurities on the substrate surfaces. The influences of charged species in the bulk and on the surface, and their induced electric field that affect both transport and surface interactions, are included in this paper. The results of this paper illustrate the model usefulness and potentials to predict the change in the rinse time and efficiency with changes in the key operational parameters such as temperature, concentration, flow rate, and mass transfer on the wafer surface. Ammonium hydroxide on SiO2 surface is used as the model system in this study because of its wide application; however, the model can be used for analyzing the rinsing of other impurities by simply changing the model parameter inputs.

Original languageEnglish (US)
Article number7586061
Pages (from-to)60-68
Number of pages9
JournalIEEE Transactions on Semiconductor Manufacturing
Volume30
Issue number1
DOIs
StatePublished - Feb 1 2017

Fingerprint

high aspect ratio
Aspect ratio
wafers
surface reactions
cleaning
Cleaning
Mass transfer
Ammonium Hydroxide
Impurities
Ammonium hydroxide
impurities
Substrates
Semiconductor devices
semiconductor devices
hydroxides
mass transfer
Desorption
convection
manufacturing
flow velocity

Keywords

  • Process model
  • single-wafer cleaning tools
  • wafer rinsing

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering

Cite this

Rinsing of high-aspect-ratio features on patterned wafers. / Chiang, Chieh Chun; Kishore, Jivaan; Raghavan, Srini; Shadman, Farhang.

In: IEEE Transactions on Semiconductor Manufacturing, Vol. 30, No. 1, 7586061, 01.02.2017, p. 60-68.

Research output: Contribution to journalArticle

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