@article{12bd4e90c74f4fe09630c6a288625384,
title = "Surrogating circuit design solutions with robustness metrics",
abstract = "With the increase in device variability, the performance uncertainty poses a daunting challenge to analog/mixed-signal circuit design. This situation requires a robust design approach to add large margins to the circuit and system-level specification to ensure correct operation and the overall yield. In this paper, we propose a new robust design approach by using norm metrics to quantify the robustness for both design parameters and performance uncertainty. In addition, we adopt a surrogating procedure to achieve robustness in design space and to reduce uncertainty in performance space. The end result of the proposed method is a Pareto-surface that provides the designer with trade-offs between design robustness and performance uncertainty. One advantage of this new approach is the ability to take into account the strong nonlinear relationship between performance and design parameters. Considering a set of highly nonlinear circuit performances, we demonstrate the effectiveness of this robust design framework on a fully CMOS operational amplifier circuit.",
keywords = "ElasticR method, Process variations, Robust design, Robustness metric, Surrogates",
author = "Jin Sun and Liang Xiao and Jiangshan Tian and He Zhou and Janet Roveda",
note = "Funding Information: She was with Intel, Santa Clara, USA, and Cadence, Santa Clara, USA from 2000 to 2002. She is currently an Associate Professor with the Department of Electrical Computing Engineering, the University of Arizona, Tucson, USA. She was a recipient of the National Science Foundation Career Award and the PEACASE Award in 2005 and 2006, respectively. She received the Best Paper Award at ISQED in 2010 as well as best paper nominations at ASPDAC in 2010, ICCAD in 2007, and ISQED in 2005. She was also the recipient of the 2008 R. Newton Graduate Research Project Award from DAC and the 2007 USS University of Arizona Outstanding Achievement Award. Her current research interests include robust VLSI circuit design, biomedical instrument design, smart grid, VLSI circuit modeling and analysis, and low power multi-core system design. Funding Information: This work was supported in part by the National Science Foundation under Grant Nos. IIA-0926278 , CCF-0915537 and CCF-0832282 , in part by National Natural Science Foundation of China (NSFC) under Grant Nos. 61502234, 71501096 and GZ213047, in part by Natural Science Foundation of Jiangsu Province of China under Grant No. SJ213031 , in part by China Postdoctoral Science Foundation under Grant No. 2014M551637 , and in part by Postdoctoral Science Foundation of Jiangsu Province under Grant No. 1401046C . The authors would like to thank Mr. Kiran Potluri for helping design the operational amplifier circuit. Publisher Copyright: {\textcopyright} 2015 Elsevier B.V. All rights reserved. Copyright: Copyright 2015 Elsevier B.V., All rights reserved.",
year = "2016",
month = jan,
day = "1",
doi = "10.1016/j.vlsi.2015.07.015",
language = "English (US)",
volume = "52",
pages = "1--9",
journal = "Integration, the VLSI Journal",
issn = "0167-9260",
publisher = "Elsevier",
}