Unscheduling, unpredication, unspeculation: Reverse engineering Itanium executables

Noah Snavely; Saumya K Debray; Gregory Andrews

doi:10.1109/WCRE.2003.1287232

Unscheduling, unpredication, unspeculation: Reverse engineering Itanium executables

Noah Snavely, Saumya K Debray, Gregory Andrews

Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Scopus citations

Abstract

EPIC (Explicitly Parallel Instruction Computing) architectures, exemplified by the Intel Itanium, support a number of advanced architectural features, such as explicit instruction-level parallelism, instruction predication, and speculative loads from memory. However, compiler optimizations to take advantage of such architectural features can profoundly restructure the program's code, making it potentially difficult to reconstruct the original program logic from an optimized Itanium executable. This paper describes techniques to undo some of the effects of such optimizations and thereby improve the quality of reverse engineering such executables.

Original language	English (US)
Title of host publication	Proceedings - Working Conference on Reverse Engineering, WCRE
Publisher	IEEE Computer Society
Pages	4-13
Number of pages	10
Volume	2003-January
ISBN (Print)	0769520278
DOIs	https://doi.org/10.1109/WCRE.2003.1287232
State	Published - 2003
Event	10th Working Conference on Reverse Engineering, WCRE 2003 - Victoria, Canada Duration: Nov 13 2003 → Nov 16 2003

Other

Other	10th Working Conference on Reverse Engineering, WCRE 2003
Country	Canada
City	Victoria
Period	11/13/03 → 11/16/03

Keywords

Computer aided instruction
Computer architecture
Computer science
Concurrent computing
Delay
Logic
Optimizing compilers
Parallel processing
Pipelines
Reverse engineering

ASJC Scopus subject areas

Software

Access to Document

10.1109/WCRE.2003.1287232

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Cite this

Snavely, N, Debray, SK & Andrews, G 2003, Unscheduling, unpredication, unspeculation: Reverse engineering Itanium executables. in Proceedings - Working Conference on Reverse Engineering, WCRE. vol. 2003-January, 1287232, IEEE Computer Society, pp. 4-13, 10th Working Conference on Reverse Engineering, WCRE 2003, Victoria, Canada, 11/13/03. https://doi.org/10.1109/WCRE.2003.1287232

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abstract = "EPIC (Explicitly Parallel Instruction Computing) architectures, exemplified by the Intel Itanium, support a number of advanced architectural features, such as explicit instruction-level parallelism, instruction predication, and speculative loads from memory. However, compiler optimizations to take advantage of such architectural features can profoundly restructure the program's code, making it potentially difficult to reconstruct the original program logic from an optimized Itanium executable. This paper describes techniques to undo some of the effects of such optimizations and thereby improve the quality of reverse engineering such executables.",

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