VERA: An extensible router architecture

S. Karlin, L. Peterson

Research output: Chapter in Book/Report/Conference proceedingConference contribution

32 Scopus citations

Abstract

We recognize two trends in router design: increasing pressure to extend the set of services provided by the router and increasing diversity in the hardware components used to construct the router. The consequence of these two trends is that it is becoming increasingly difficult to map the services onto the underlying hardware. Our response to this situation is to define a virtual router architecture, called VERA, that hides the hardware details from the forwarding functions. This paper presents the details of VERA and reports preliminary experiences implementing various aspects of the architecture.

Original languageEnglish (US)
Title of host publication2001 IEEE Open Architectures and Network Programming Proceedings, OPENARCH 2001
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages3-14
Number of pages12
ISBN (Electronic)0780370643, 9780780370647
DOIs
StatePublished - 2001
EventIEEE Open Architectures and Network Programming Proceedings, OPENARCH 2001 - Anchorage, United States
Duration: Apr 27 2001Apr 28 2001

Publication series

Name2001 IEEE Open Architectures and Network Programming Proceedings, OPENARCH 2001

Other

OtherIEEE Open Architectures and Network Programming Proceedings, OPENARCH 2001
CountryUnited States
CityAnchorage
Period4/27/014/28/01

Keywords

  • COTS
  • Classification
  • Internet Router
  • QoS
  • Scheduling

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture

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    Karlin, S., & Peterson, L. (2001). VERA: An extensible router architecture. In 2001 IEEE Open Architectures and Network Programming Proceedings, OPENARCH 2001 (pp. 3-14). [916834] (2001 IEEE Open Architectures and Network Programming Proceedings, OPENARCH 2001). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/OPNARC.2001.916834