Yield-area optimizations of digital circuits using non-dominated sorting genetic algorithm (YOGA)

Vineet Agarwal, Meiling Wang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

With shrinking technology, the timing variation of a digital circuit is becoming the most important factor while designing a functionally reliable circuit. Gate sizing has emerged as one of the efficient way to subside the yield deterioration due to manufacturing variations. In the past single-objective optimization techniques have been used to optimize the timing variation whereas on the other hand multi-objective optimization techniques can provide a more promising approach to design the circuit. We propose a new algorithm called YOGA, based on multi-objective optimization technique called Non-dominated Sorting Genetic Algorithm (NSGA). YOGA optimizes a circuit in multi domains and provides the user with Pareto-optimal set of solutions which are distributed all over the optimal design spectrum, giving users the flexibility to choose the best fitting solution for their requirements. YOGA overcomes the disadvantages of traditional optimization techniques, while even providing solutions in very stringent bounds.

Original languageEnglish (US)
Title of host publicationProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Pages718-723
Number of pages6
Volume2006
StatePublished - 2006
EventASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006 - Yokohama, Japan
Duration: Jan 24 2006Jan 27 2006

Other

OtherASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006
CountryJapan
CityYokohama
Period1/24/061/27/06

Fingerprint

Digital circuits
Sorting
Genetic algorithms
Multiobjective optimization
Networks (circuits)
Deterioration

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Agarwal, V., & Wang, M. (2006). Yield-area optimizations of digital circuits using non-dominated sorting genetic algorithm (YOGA). In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC (Vol. 2006, pp. 718-723). [1594771]

Yield-area optimizations of digital circuits using non-dominated sorting genetic algorithm (YOGA). / Agarwal, Vineet; Wang, Meiling.

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. Vol. 2006 2006. p. 718-723 1594771.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Agarwal, V & Wang, M 2006, Yield-area optimizations of digital circuits using non-dominated sorting genetic algorithm (YOGA). in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. vol. 2006, 1594771, pp. 718-723, ASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006, Yokohama, Japan, 1/24/06.
Agarwal V, Wang M. Yield-area optimizations of digital circuits using non-dominated sorting genetic algorithm (YOGA). In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. Vol. 2006. 2006. p. 718-723. 1594771
Agarwal, Vineet ; Wang, Meiling. / Yield-area optimizations of digital circuits using non-dominated sorting genetic algorithm (YOGA). Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. Vol. 2006 2006. pp. 718-723
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